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Middle / Senior Physical Design Engineer

GLOBRECS | Global Recruitment Solutions is a company with a specialization in fast and accurate IT recruitment. We help our clients across Europe and Central Asia hire the best software and hardware engineers, various specialists, and managers in the IT field.

We are looking for a Middle / Senior Physical Design Engineer to join our client’s VLSI team. Our client is a fast-growing Israeli company providing electronics design and verification services for the R&D teams of multiple clients.

TO-DO LIST:

  • Take responsibility for a full ASIC back-end flow from RTL to GDS for highly complex Mixed-signal (Digital, Analog, RF) SoCs;
  • To perform design flow cycles including Synthesis, STA, LEC, block level PnR, floor-planning, clock, and power distribution, power, and noise analysis (EM / IR-Drop / Xtalk) as well as knowledge in layout verification (DRC / LVS).

QUALIFICATIONS:

  • Bachelor of Science / higher education in Electrical Engineering / Computer Engineering / Computer Science from a well-known University;
  • 2-5 or more years of experience as an ASIC Back-end engineer;
  • Extensive experience with one of the place & route tools available today (Synopsys / Cadence);
  • In-depth understanding of static-timing analysis;
  • Experience in advanced CMOS process nodes (double patterning);
  • Experience in integration of Soft and hard IPs;
  • Experience with the hierarchical design approach, top-down design, timing, and physical convergence;
  • Extensive know-how in clock/power distribution and analysis, RC extraction, and correlation;
  • Experience with SoC practices such as multiple voltages and clock domains, integration of mixed-signal Ips, and I/O integration;
  • Experience with working in Unix environment and version control tools;
  • Willing to work in a dynamic and demanding environment;
  • Fast learner;
  • A team player with the ability to work independently;
  • Fluent in English.

NICE TO HAVE:

  • Scripting and programming experience using several of the following: Perl, TCL, and Make – Knowledge in Verilog;
  • Experience with RF design/back-end for RF design;
  • Experience with Synopsys

QUIRKS & PERKS:

  • It is a full-time remote B2B contract job;
  • Flexible working schedule;
  • Monthly salary of 3000-8000$;
  • This is an exciting opportunity to join a team of highly talented engineers, working with the most cutting-edge technologies;
  • Opportunities for further career growth!

Please, send your CV to info@globrecs.com. For more information contact us by Skype: dmitry.tolmachov or by Telegram: @dmitry_tolmachov

GLOBRECS | Global Recruitment Solutions – your success is our challenge!

 

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